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Impala Linear Corporation
ILC6382
1-Cell to 3-Cell Boost with True Load Disconnect, 3.3V, 5V or Adjustable Output
General Description The ILC6382 series of step-up DC-DC converters operate from 1-cell to 3-cell input. In shutdown mode, the device allows true load disconnect from battery input. Designed for wireless communications applications, the oscillator frequency is set at 300kHz with no harmonics at sub 20kHz audio band or at 455kHz IF band. Oscillator frequency is externally synchronizable from 200kHz to 400kHz. Internal synchronous rectification and dual PFM/PWM mode of operation allows greater than 90% efficiency at light and full load. The ILC6382 is capable of delivering 75mA at 3.3V output from a single cell input.The ILC6382XX offers 3.3V or 5V fixed output voltage while the ILC6382-Adj allows adjustable output voltage to 6V maximum. Output voltage accuracy is +2% over specified temperature range. Additional features include power good output (POK) and an internal low battery detector with 100s transient rejection delay. The device will reject low battery input transients under 100msec in duration. The ILC6382 series is available in a space saving eight lead micro SOP (MSOP-8) package.
Features ! 0.9V to 6V input voltage ! Guaranteed start up at 0.9V input ! Synchronous rectification requires no external diode ! True load disconnect from battery input in shutdown ! Up to 75mA@3.3V and 40mA@5V from 1V input ! Up to 375mA@3.3V and 160mA@5V from 3V input ! Efficiency > 90% from 10mA to 150mA at VOUT = 5V !1A battery input current in shutdown (with VOUT = 0V) ! Internal Oscillator frequency : 300kHz to 15% ! External freq synchronization from 150kHz to 500kHz ! ILC6382 : Fixed 3.3V or 5V output ! ILC6382-Adj : Adjustable output to 6V maximum ! Low battery detector with 100ms transient rejection delay ! Powergood output flag when VOUT is in regulation Applications ! Cellular Phones, Pagers ! Palmtops, PDAs and portable electronics ! High efficiency 1V step up converters
Typical Circuit
CIN 10F + 15H VIN
1 to 3-cell
L 1 2 R5 3
ILC6382-XX
LX VIN LBI/SD SYNC VOUT GND LBO POK
CIN 10F 8 7 6 5 Low Battery Detector Output Power Good Output +
10F COUT
L 1 15H 2 R5 3
ILC6382-ADJ
LX VIN LBI/SD SYNC VOUT GND
VOUT VIN
1 to 3-cell
+
8 7 6 5
+
COUT
10F
VOUT
R1 LBO
VFB
ON OFF
R6 4 Ext Sync
ON OFF R6
4 Ext Sync
MSOP-8
R2 MSOP-8 VOUT = 1.25 (1+R1/R2)
Figure 1: ILC6382
Figure 2: ILC6382-Adj
(Note: Pin 9 should be connected to ground if unused.)
Impala Linear Corporation
ILC6382 1.5
(408) 574-3939
www.impalalinear.com
Oct 1999
1
1-Cell to 3-Cell Boost with True Load Disconnect, 3.3V, 5V, or Adjustable Output
Pin-Package Configurations
LX VIN LB/SD SYNC
1 2 3 4
8 7 6 5
VOUT GND LBO POK
LX VIN LB/SD SYNC
1 2 3 4
8 7 6 5
VOUT GND LBO VFB
Ordering Information* (TA = -40C to + 85C) ILC6382CIR-33 3.3V output, MSOP-8 package ILC6382CIR-50 5V output, MSOP-8 package ILC6382CIR-ADJ Adjustable output, MSOP-8 package
MSOP
(TOP VIEW)
MSOP
(TOP VIEW)
ILC6382CIR-XX
ILC6382CIR-ADJ
Pin Functions ILC6382
Pin Number 1 2 3 4 SYNC 5 POK (ILC6382CIR-XX) VFB (ILC6382CIR-ADJ) LBO GND VOUT Pin Name Lx VIN LBI/SD Pin Description Inductor input. Inductor L connected between this pin and the battery Connect directly to battery Low battery detect input and shutdown. Low battery detect threshold is set with this pin using a potential divider. If this pin is pulled to logic low then the device will shutdown. A logic level signal referenced to VIN, at a frequency between 150kHz and 500kHz on this pin will override the internal 300kHz oscillator. If the SYNC function is unused then pin 4 should be connected to ground This open drain output pin will go high when output voltage is within regulation, 0.92*VOUT (NOM) < VOUT < 0.98*VOUT (NOM) This pin sets the adjustable output voltage via an external resistor divider network. The formula for choosing the resistors is shown in the "Applications Information" section. This open drain output will go low if the battery voltage is below the low battery threshold set at pin 3 Connect this pin to the battery and system ground This is the regulated output voltage
6 7 8
Impala Linear Corporation
ILC6382 1.5
(408) 574-3939
www.impalalinear.com
Oct 1999
2
1-Cell to 3-Cell Boost with True Load Disconnect, 3.3V, 5V, or Adjustable Output
Absolute Maximum Ratings (Note 1)
Parameter Voltage on VOUT pin Voltage on LBI, Sync, LBO, POK, VFB, LX and VIN pins Peak switch current on LX pin Current on LBO pin Continuous total power dissipation at 85 C Short circuit current Operating ambient temperature Maximum junction temperature Storage temperature Lead temperature (soldering 10 sec) Package thermal resistance Symbol VOUT ILX Isink(LBO) Pd ISC TA TJ (max) Tstg JA Ratings -0.3 to 7 -0.3 to 7 1 5 400 Internally protected (1 sec duration) -40 to 85 170 -40 to 125 300 206 Units V V A mA mW A C C C C C/W
Electrical Characteristics ILC6382CIR-33
Unless otherwise specified all limits are at VOUT =3.3V, VIRI = 1.5V, Fosc = 300kHz and TA = 25C. Test circuit of figure 1. BOLDFACE type indicates limits that apply over the full operating temperature range. Note 2.
Parameter Output Voltage Output Current Symbol VOUT IOUT Conditions 0.9V < VIN < 3V, IOUT= 0mA 0.9V < VIN < 3V, IOUT= 0mA VIN = 0.9V, VOUT = VOUT(nom) 4% VIN = 1.2V, VOUT = VOUT(nom) 4% VIN = 2.4V, VOUT = VOUT(nom) 4% VIN = 3.0V, VOUT = VOUT(nom) 4% Load Regulation No Load Battery Input Current Efficiency VOUT IIN( no load ) VIN = 1.2V, 0mA < IOUT < 50mA VIN = 1.2V, IOUT = 0mA VIN = 1.2V, IOUT = 3mA VIN = 1.2V, IOUT=30mA VOUT (no load) VIN = 1.2V, 0mA < IOUT < 75mA Min 3.234 3.201 50 75 200 375 1.5 2.4 250 82 90 A % % Typ 3.300 Max 3.366 3.399 mA Units V
Impala Linear Corporation
ILC6382 1.5
(408) 574-3939
www.impalalinear.com
Oct 1999
3
1-Cell to 3-Cell Boost with True Load Disconnect, 3.3V, 5V, or Adjustable Output
Electrical Characteristics ILC6382CIR-50
Unless otherwise specified all limits are at VOUT = 5V, VIRI = 1.5V, Fosc = 300kHz and TA = 25C. Test circuit of figure 1. BOLDFACE type indicates limits that apply over the full operating temperature range. Note 2.
Parameter Output Voltage Output Current Symbol VOUT IOUT Conditions 0.9V < VIN < 3V, IOUT = 0mA 0.9V < VIN < 3V, IOUT = 0mA VIN = 1.2V, VOUT = VOUT(nom) 4% VIN = 2.4V, VOUT = VOUT(nom) 4% VIN = 3.0V, VOUT = VOUT(nom) 4% Load Regulation No Load Battery Input Current Efficiency VIN = 2.4V, IOUT = 3mA VIN = 2.4V, IOUT =100mA 85 92 % IIN ( no load ) VIN = 2.4V, 0mA < IOUT < 60mA VIN = 2.4V, IOUT = 0mA Min 4.950 4.900 50 110 160 3 250 % A Typ 5.000 Max 5.050 5.100 mA Units V
General Electrical Characteristics for all voltage versions.
Unless otherwise specified all limits are at VIN = 2.4V, VIRI = 1.5V, Fosc = 300kHz, IOUT = 0mA and TA = 25C. Test circuits of figure 1 and figure 2 for ILC6382CIR-XX and ILC6382CIR-ADJ respectively. BOLDFACE type indicates limits that apply over the full operating temperature range. Note 2.
Parameter Minimum startup voltage Input voltage range Battery input current in load disconnect mode Switch on resistance Oscillator frequency External clock frequency range (sync) External clock pulse width External clock rise/fall time LBI input threshold Input leakage current LBI hold time Symbol VIN(start) VIN IIN(SD) Rds(on) fosc fsync tW(sync) tr / tf VREF ILEAK thold(LBI) Note 4 Note 4 Conditions IOUT = 0mA VOUT = VOUT(nominal) 4% IOUT = 0mA (Note 3) VLBI/SD < 0.4V, VOUT = 0V (short circuit) N-Channel MOSFET P-Channel MOSFET Min 0.9 1 1 400 750 300 Typ 0.9 Max 1 6 6 2 Units V V A
255 150 200 1.175 1.150 Pins LBI/SD, Sync and VFB, Note 4 Note 5 120
345 500
m kHz kHz ns ns V nA ms
1.250
100 1.325 1.350 200
100
Impala Linear Corporation
ILC6382 1.5
(408) 574-3939
www.impalalinear.com
Oct 1999
4
1-Cell to 3-Cell Boost with True Load Disconnect, 3.3V, 5V, or Adjustable Output
General Electrical Characteristics for all voltage versions (Continued).
Unless otherwise specified all limits are at VIN = 2.4V, VLBI = 1.5V, Fosc = 300kHz, IOUT = 0mA and TA = 25C. Test circuits of figure 1 and figure 2 for ILC6382-XX and ILC6382-ADJ respectively. BOLDFACE type indicates limits that apply over the full operating temperature range. Note 2
Parameter LBO output voltage low LBO output leakage current Shutdown input voltage low Shutdown input voltage high Sync input voltage low Sync input voltage high POK output voltage low POK output voltage high POK output leakage current POK threshold POK hysteresis Feedback voltage (ILC6382 - ADJ only) Output voltage adjustment range (ILC6382CIR-ADJ only) VOUT(adj) min VOUT(adj) max VIN = 0.9V, IOUT = 50mA VIN = 3V, IOUT = 50mA 6 Note 1. Absolute maximum ratings indicate limits which, when exceeded, may result in damage to the component. Electrical specifications do not apply when operating the device outside its rated operating conditions. Note 2. Specified min/max limits are production tested or guaranteed through correlation based on statistical control methods. Measurements are taken at constant junction temperature as close to ambient as possible using low duty pulse testing. Note 3. VOUT (NOM) is the nominal output voltage at IOUT = 0mA. Note 4. Guaranteed by design. Note 5. In order to get a valid low-battery-output (LBO) signal, the input voltage must be lower than the low-battery-input (LBI) threshold for a duration greater than the low battery hold time (thold(LBI)). This feature eliminates false triggering due to voltage transients at the battery terminal. VTH(POK) VHYST VFB 1.225 1.212 2.5V V 0.92xV OUT 0.95xVO UT 0.98xVO UT 50 1.250 1.275 1.288 V V mV Symbol VLBO(low) ILBO(hi) VSD(low) VSD(hi) Vsync(low) Vsync(hi) VPOK(low) VPOK(hi) IL(POK) Force 6V at pin 5 ISINK = 2mA, open drain output 1 1 VLBI = 1V VLBO = 5V 1 2 0.4 6 0.4 6 0.4 6 2 A V V V V V V A Conditions ISINK = 2mA, open drain output, Min Typ Max 0.4 Units V
Impala Linear Corporation
ILC6382 1.5
(408) 574-3939
www.impalalinear.com
Oct 1999
5
1-Cell to 3-Cell Boost with True Load Disconnect, 3.3V, 5V, or Adjustable Output
APPLICATIONS INFORMATION
The ILC6382 performs boost DC-DC conversion by controlling the switch element as shown in the simplified circuit in figure 3 below. PWM Mode Operation The ILC6382 uses a PWM or Pulse Width Modulation technique. The switches are constantly driven at typically 300kHz. The control circuitry varies the power being delivered to the load by varying the on-time, or duty cycle, of the switch SW1 (see fig. 5). Since more on-time translates to higher current build-up in the inductor, the maximum duty cycle of the switch determines the maximum load current that the device can support. There are two key advantages of the PWM type controllers. First, because the controller automatically varies the duty cycle of the switch's on-time in response to changing load conditions, the PWM controller will always have an optimized waveform for a steady-state load. This translates to very good efficiency at high currents and minimal ripple on the output. Ripple is due to the output cap constantly accepting and storing the charge received from the inductor, and delivering charge as required by the load. The "pumping" action of the switch produces a sawtooth-shaped voltage as seen by the output. The other key advantage of the PWM type controllers is that the radiated noise due to the switching transients will always occur at the (fixed) switching frequency. Many applications do not care much about switching noise, but certain types of applications, especially communication equipment, need to minimize the high frequency interference within their system as much as possible. Using a boost converter requires a certain amount of higher frequency noise to be generated; using a PWM converter makes that noise highly predictable thus easier to filter out. PFM Mode Operation There are downsides of PWM approaches, especially at very low currents. Because the PWM technique relies on constant switching and varying duty cycle to match the load conditions, there is some point where the load current gets too small to be handled efficiently. An actual switch consumes some finite amount of current to switch on and off; at very low currents this can be of the same magnitude as the load current itself, driving switching efficiencies down to 50% and below. The ILC6382 overcomes this limitation by automatically switching over to a PFM, or Pulse Frequency Modulation, technique at low currents. This technique conserves power loss by only switching the output if the current drain requires it. As shown in the figure 5, the waveform actually skips pulses depending on the power needed by the output. This technique is also called "pulse skipping" because of this characteristic.
Figure 3: Basic Boost Circuit
When the switch is closed, current is built up through the inductor. When the switch opens, this current has to go somewhere and is forced through the diode to the output. As this on and off switching continues, the output capacitor voltage builds up due to the charge it is storing from the inductor current. In this way, the output voltage gets boosted relative to the input. In general, the switching characteristic is determined by the output voltage desired and the current required by the load. Specifically the energy transfer is determined by the power stored in the coil during each switching cycle. PL = (tON, VIN) Synchronous Rectification The ILC6382 also uses a technique called "synchronous rectification" which removes the need for the external diode used in other circuits. The diode is replaced with a second switch or in the case of the ILC6382, an FET as shown in figure 4 below.
VIN LX
SW1 SW2
+
ILC6382
VOUT
PWM/PFM CONTROLLER
POK GND
SHUTDOWN CONTROL
+ VREF
DELAY
LBO
-
SYNC
LB/SD
Figure 4: Simplified ILC6382 block diagram
The two switches now open and close in opposition to eachother, directing the flow of current to either charge the inductor or to feed the load. The ILC6382 monitors the voltage on the output capacitor to determine how much and how often to drive the switches.
Impala Linear Corporation
ILC6382 1.5
(408) 574-3939
www.impalalinear.com
Oct 1999
6
1-Cell to 3-Cell Boost with True Load Disconnect, 3.3V, 5V, or Adjustable Output
Switch Waveform
VSET
VOUT
Figure 5: PFM Waveform
Low Battery Detector The ILC6382's low battery detector is a based on a CMOS comparator. The negative input of the comparator is tied to an internal 1.25V (nominal) reference, VREF. The positive input is the LBI/SD pin. It uses a simple potential divider arrangement with two resistors to set the LBI threshold as shown in Figure 6. The input bias current of the LBI pin is only 200nA. This means that the resistor values R1 and R2 can be set quite high. The formula for setting the LBI threshold is: VLBI = VREF x (1+R5/R6)
2 VIN ILC6382 Shutdown R5 3 6 + DELAY 100ms LBO LBI/SD R6 3.3V RPU
In the ILC6382, the switchover from PWM to PFM mode occurs when the PWM waveform drops to a low duty cycle. The low PWM duty cycle indicates to the controller that the load current is small and so it switches over to the PFM mode to improve efficiency and conserve power. The Dual PWM/PFM mode architecture was designed specifically for applications such as wireless communications, which need the spectral predictability of a PWM-type DC-DC converter, yet also need the highest efficiencies possible, especially in Standby mode. Other Considerations The other limitation of PWM techniques is that, while the fundamental switching frequency is easier to filter out since it's constant, the higher order harmonics of PWM will be present and may have to be filtered out, as well. Any filtering requirements, though, will vary by application and by actual system design and layout, so generalizations in this area are difficult, at best. However, PWM control for boost DC-DC conversion is widely used, especially in audio-noise sensitive applications or applications requiring strict filtering of the high frequency components. External Frequency Syncronization External frequency syncronization is allowed on the ILC6382. When an external signal between 150kHz to 500kHz is connected to pin 4, the internal oscillator will be over-ridden. This technique is useful when designers wish to synchronize two or more converters using the same external source in order to avoid unexpected harmonics. Connect pin 4 to ground or VIN if the external frequency syncronization function is not used.
1.25V Internal Reference 7 GND
Figure 6: Low Battery Detector
Since the LBI input current is negligible (<200nA), this equation is derived by applying voltage divider formula across R6. A typical value for R6 is 100k. R5 = 100k x [(VLBI/VREF) -1], where VREF=1.25V (nom.) The LBI detector has a built in delay of 120ms. In order to get a valid low-battery-output (LBO) signal, the input voltage must be lower than the low-battery-input (LBI) threshold for a duration greater than the low battery hold time (thold(LBI)) of 120msec. This feature eliminates false triggering due to voltage transients at the battery terminal caused by high frequency switching currents. The output of the low battery detector is an open drain capable of sinking 2mA. A 10k pull-up resistor is recommended on this output. Note that when the device is not in PWM mode or is in shutdown the low battery detector does not operate. For VLBI < 1.25V The low battery detector can also be configured for voltages <1.25V by bootstrapping the LBI input from VOUT. The circuitry for this is shown in figure 7.
Impala Linear Corporation
ILC6382 1.5
(408) 574-3939
www.impalalinear.com
Oct 1999
7
1-Cell to 3-Cell Boost with True Load Disconnect, 3.3V, 5V, or Adjustable Output
ILC6382 R2 VIN R1 3 LBI/SD + 1.25V Internal Reference 7 GND 8 VOUT
Power Good Output (POK) The POK output of the ILC6382 indicates when VOUT is within the regulation tolerance of the set output voltage. POK output is an open drain device output capable of sinking 2mA. It will remain pulled low until the output voltage has risen to typically 95% of the specified VOUT. Note that a pull-up resistor must be connected from the POK output (pin 5 of ILC6382CIR-XX) to either ILC6382's output or to some other system voltage source. Adjustable Output Voltage Selection The ILC6382-ADJ allows the output voltage to be set using a potential divider. The formula for setting the adjustable output voltage is; VOUT = VFB x (1+R1/R2) Where VFB is the threshold set which is 1.25V nominal.
IN 10F
Figure 7: VLBI < 1.25V
The following equation is used when VIN is lower than 1.25V: R1 = R2 x [(VREF - VIN) / (VOUT - VREF)], where VREF = 1.25V (nom.) This equation can also be derived using voltage divider formula across R2. A typical value for R2 is 100k. Note that the low battery detector does not operate when the ILC6382 is in PFM mode or in shutdown. Shut Down The LBI pin is shared with the shutdown pin. A low voltage (<0.4V) will put the ILC6382 into a power down state. The simplest way to implement this is with an FET across R6 as shown in figure 8. Note that when the device is not in PWM mode or is in shutdown the low battery detector does not operate. When the ILC6382 is shut down, the synchronous rectifier disconnects the output from the input. This ensures that there is only leakage (IIN < 1A typical) from the input to the output so that the battery is not drained when the ILC6382 is shut down.
C
ILC6382-ADJ L 1 LX VIN LBI/SD SYNC VOUT GND LBO VFB 8 + 7 6 5 R2 MSOP-8 Ext Sync
(Connect to GND if unused) 10F COUT
VOUT
VIN 1 to 3-cell ON OFF R6 R5
15H 2 3 4
R1
VOUT = 1.25 (1+R1/R2)
Figure 9: Adjustable Voltage Configuration
Negative Voltage Output It is possible to generate a negative output voltage as a secondary supply using the ILC6382. This negative voltage may be useful in some applications where a negative bias voltage at low current is required.
1A Schottky Diodes -V 0.01F 0.01F ILC6382
1 LX
2 VIN ILC6382 R5 3 LBI/SD R6 7 GND VIN L
ON/OFF
2 VIN
Figure 10: Negative Output Votlage
Figure 8: Shut Down Control
Impala Linear Corporation
ILC6382 1.5
(408) 574-3939
www.impalalinear.com
Oct 1999
8
1-Cell to 3-Cell Boost with True Load Disconnect, 3.3V, 5V, or Adjustable Output
External Component Selection
Inductors The ILC6382 is designed to work with a 15H inductor in most applications. There are several vendors who supply standard surface mount inductors to this value. Suggested suppliers are shown in table 1. Higher values of inductance will improve efficiency, but will reduce peak inductor current and consequently ripple and noise, but will also limit output current.
Vendor Coilcraft Part No DO3308P-153 D03316P-153 D01608C-153 LQH4N150K LQH3C150K CDR74B-150MC CD43-150 CD54-150 NLC453232T-150K Contact (847) 639 6400
Layout and Grounding Considerations High frequency switching and large peak currents means PCB design for DC-DC converters requires careful consideration. A general rule is to place the DC-DC converter circuitry well away from any sensitive RF or analog components. The layout of the DC-DC converters and its external components are also based on some simple rules to minimise EMI and output voltage ripple. Layout 1. Place all power components, ILC6382, inductor, input capacitor and output capacitor as close together as possible. 2. Keep the output capacitor as close to the ILC6382 as possible with very short traces to the VOUT and GND pins. Typically it should be within 0.25 inches or 6mm. 3. Keep the traces for the power components wide, typically >50mil or 1.25mm. 4. Place the external networks for LBI and VFB close to the ILC6382, but away from the power components as far as possible. Grounding 1. Use a star grounding system with separate traces for the power ground and the low power signals such as LBI/SD and VFB. The star should radiate from where the power supply enters the PCB. 2. On multilayer boards use component side copper for grounding around the ILC6382 and connect back to a quiet ground plane using vias.
muRata Sumida
(814) 237 1431 (847) 956 0666
TDK
(847) 390 4373
Capacitors
Input Capacitor The input capacitor is necessary to minimize the peak current drawn from the battery. Typically a 10F tantalum capacitor is recommended. Low equivalent series resistance ( ESR ) capacitors will help to minimize battery voltage ripple. Output Capacitor Low ESR capacitors should be used at the output of the ILC6382 to minimize output ripple. The high switching speeds and fast changes in the output capacitor current, mean that the equivalent series impedance of the capacitor can contribute greatly to the output ripple. In order to minimize these effects choose an output capacitor with less than 10nH of equivalent series inductance (ESL) and less than 100m of equivalent series resistance (ESR). Typically these characteristics are met with ceramic capacitors, but may also be met with certain types of tantalum capacitors. Suitable vendors are shown in table 2.
Description T495 series tantalum 595D series tantalum TAJ, TPS series tantalum X7R Ceramic Vendor Kemet Sprague AVX TDK AVX Contact (864) 963 6300 (603) 224 1961 (803) 946 0690 (847) 390 4373 (803) 946 0690
CIN 10F
ILC6382 L1 1 LX VIN LBI/SD SYNC VOUT GND LBO VFB 8 7 6 5 R2 +
COUT 10F
VOUT
VIN
15H 2 3
R1
R3 Load
ON/OFF 4 R4
Local "Quiet" Ground Power Ground
Recommended application circuit schematic for ILC6382CIR-ADJ
Impala Linear Corporation
ILC6382 1.5
(408) 574-3939
www.impalalinear.com
Oct 1999
9
1-Cell to 3-Cell Boost with True Load Disconnect, 3.3V, 5V, or Adjustable Output
Impala Linear Corp. ILC 6382-ADJ Eval Board
Impala Linear Corp. ILC 6382-ADJ Eval Board
L1 J1
L1 C1 J1 C2 GND VIN VOUT LBO SYNC GND
S1 ON OFF
U1
R3
PGND
GND VIN VOUT LBO SYNC GND
S1 ON OFF
U1
R3
PGND
R1 R2
R4
R1 R2
R4
Evaluation Board Parts List For Printed Circuit Board Shown Above
Label U1 CIN, COUT L1 R1 and R2 R3 R4 Part Number ILC6382CIR-ADJ 2221Y106M250NT DO1608C-153 Manufacturer Impala Linear Novacap Coilcraft Dale, Panasonic Dale, Panasonic Dale, Panasonic Description Step-up DC-DC converter 10F, ceramic capacitor 15H, 0.15 inductor User determined values 10k, 1/10W, SMT 1Meg, 1/10W, SMT
Impala Linear Corporation
ILC6382 1.5
(408) 574-3939
www.impalalinear.com
Oct 1999
10
1-Cell to 3-Cell Boost with True Load Disconnect, 3.3V, 5V, or Adjustable Output
Typical Performance Characteristics ILC6382CIR-33 (VOUT = 3.3 V)
Unless otherwise specified: TA = 25C, CIN = 10F, COUT = 10F, L = 10H
Efficiency
90 V OUT =3.3V V IN =1.2V 3.26
Line Regulation
VOUT =3.3V (nominal) 3.34 IOUT =70mA
Efficiency ( %)
85
V IN =2.4V V OU T (V)
3.32 3.30 3.28 3.26
VIN =0.9V 80
75 10
20
30 40 IOUT (mA)
50 60 70 80 90100
3.24 0.9
1.4
1.9 V IN (V)
2.4
2.9
Load Regulation
3.35 V OUT =3.3V (nominal) 3.33 VIN =2.4V V OU T ( V) 3.35 3.30 3.25 3.20 3.27
VV IN =0.9V IN = 0.9V
VOUT vs Temperature
3.40 IOUT =75mA V IN=1.5V
VIN =1.2V
VO U T (V)
3.31
3.29 V IN =1.2V
VIN=0.9V
3.15 3.10 -40 -30 -20 -10
3.25 0
20
40
60 IOUT (mA)
80
100
0 10 20 30 40 50 60 70 80 90 Temperature (C)
Load Switching Waveforms (PWM Mode)
LX P in 2V/div
X Pin 2V /di v
Load Switching Waveforms (PFM Mode)
V OUT 1 0m V/di v
0V IOUT =75mA VOUT =3.3V VIN =1.2V 0mA 1s/div AE
Ind u ctor Cu rre nt 200m A/di v L
0V
0V
AC Cou pl e d
0mA V OUT =3.3V VIN =1.2V IOUT =12mA OUT = 12mA 0V 10s/divAE
In du cto r Cur re n t 2 00 m A/d i v
V OUT 10 m V/d iv
Impala Linear Corporation
ILC6382 1.5
AC C oupl ed
(408) 574-3939
www.impalalinear.com
Oct 1999
11
1-Cell to 3-Cell Boost with True Load Disconnect, 3.3V, 5V, or Adjustable Output
Typical Performance Characteristics ILC6382CIR-33 (VOUT = 3.3V)
Unless otherwise specified: TA = 25C, CIN = 10F, COUT = 10F, L = 15H.
VOUT = 3.3V VIN = 1.2V IOUT = 75mA
VOUT = 3.3V VIN = 1.2V IOUT = 10mA VIN = 1.2V IOUT = 40mA
VOUT = 3.3V IOUT = 0mA
Impala Linear Corporation
ILC6382 1.5
(408) 574-3939
www.impalalinear.com
Oct 1999
12
1-Cell to 3-Cell Boost with True Load Disconnect, 3.3V, 5V, or Adjustable Output
Typical Performance Characteristics ILC6382CIR-33 (VOUT = 3.3V)
Unless otherwise specified: TA = 25C, CIN = 10F, COUT = 10F, L = 15H.
Impala Linear Corporation
ILC6382 1.5
(408) 574-3939
www.impalalinear.com
Oct 1999
13
1-Cell to 3-Cell Boost with True Load Disconnect, 3.3V, 5V, or Adjustable Output
Typical Performance Characteristics ILC6382CIR-33 (VOUT = 3.3V)
Unless otherwise specified: TA = 25C, CIN = 10F, COUT = 10F, L = 15H.
VOUT = 3.3V VIN = 1.2V
VOUT = 3.3V VIN = 1.2V IOUT = 66mA IOUT = 50mA
External Freq. = 175kHz
VOUT = 3.3V VIN = 1.2V CIN = 10F COUT = 2 x 220F
Impala Linear Corporation
ILC6382 1.5
(408) 574-3939
www.impalalinear.com
Oct 1999
14
1-Cell to 3-Cell Boost with True Load Disconnect, 3.3V, 5V, or Adjustable Output
Typical Performance Characteristics ILC6382CIR-33 (VOUT = 3.3V)
Unless otherwise specified: TA = 25C, CIN = 10F, COUT = 10F, L = 15H.
VIN = 3.0V
VIN = 2.4V
Impala Linear Corporation
ILC6382 1.5
(408) 574-3939
www.impalalinear.com
Oct 1999
15
1-Cell to 3-Cell Boost with True Load Disconnect, 3.3V, 5V, or Adjustable Output
Typical Performance Characteristics ILC6382CIR-33 (VOUT = 3.3V)
Unless otherwise specified: TA = 25C, CIN = 10F, COUT = 10F, L = 15H.
VOUT = 5.0V VIN = 1.2V
Impala Linear Corporation
ILC6382 1.5
(408) 574-3939
www.impalalinear.com
Oct 1999
16
1-Cell to 3-Cell Boost with True Load Disconnect, 3.3V, 5V, or Adjustable Output
Typical Performance Characteristics ILC6382CIR-33 (VOUT = 3.3V)
Unless otherwise specified: TA = 25C, CIN = 10F, COUT = 10F, L = 15H.
VOUT = 5.0V VIN = 2.4V
VOUT = 5.0V VIN = 2.4V IOUT = 75mA
VOUT = 5.0V VIN = 1.2V IOUT = 67mA COUT = 10F Fundamental: 352kHz/2.5mVRMS First Harmonic: 704kHz/1.5mVRMS
Impala Linear Corporation
ILC6382 1.5
(408) 574-3939
www.impalalinear.com
Oct 1999
17
1-Cell to 3-Cell Boost with True Load Disconnect, 3.3V, 5V, or Adjustable Output
Typical Performance Characteristics ILC6382CIR-33 (VOUT = 3.3V)
Unless otherwise specified: TA = 25C, CIN = 10F, COUT = 10F, L = 15H.
Spectral Noise Plot
1.75 1.40 V OUT =5.0V V IN =1.2V IOUT =67mA COUT =2x 10F 1.5 1.4 1.3 Input Voltage (V) 1.2 1.1 1 0.9 0.8 0.7 0.6 0.5 0 100 1K 10K Freq (Hz) 100K 1M
Start-Up Input Voltage vs. Output Current
V OUT = 5V
1.05 VO UT (mVr ms) Fundamental: 352kHz/1.3mVrms First Harmonic: 704kHz/0.49mVrms
0.70
0.35
0
20
40
AE
60 IOUT (mA)
80
100
120
Impala Linear Corporation
ILC6382 1.5
(408) 574-3939
www.impalalinear.com
Oct 1999
18
1-Cell to 3-Cell Boost with True Load Disconnect, 3.3V, 5V, or Adjustable Output
Package Dimensions
MSOP-8 All dimensions in inches
0.118 0.004 .020 TYP.
0.118 0.004
0.013 TYP. 0.0256 BSC
0.000-0.005 RAD. TYP. 12 TYP
0.116 0.006 RAD. TYP. 3 TYP.
0.040 12 TYP 0.004 SEATING PLANE 0.118 0.037 0.0215
Devices sold by Impala Linear Corporation are covered by the warranty and patent indemnification provisions appearing in its Terms of Sale only. Impala Linear Corporation makes no warranty, express, statutory, implied, or by description regarding the information set forth herein or regarding the freedom of the described devices from patent infringement. Impala Linear Corporation makes no warranty of merchantability or fitness for any purpose. Impala Linear Corporation reserves the right to discontinue production and change specifications and prices at any time and without notice. This product is intended for use in normal commercial applications. Applications requiring an extended temperature range, unusual environmental requirements, or high reliability applications, such as military and aerospace, are specifically not recommended without additional processing by Impala Linear Corporation. Impala Linear Corporation assumes no responsibility for the use of any circuitry other than circuitry embodied in an Impala Linear Corporation product. No other circuits, patents, licenses are implied.
Life Support Policy Impala Linear Corporation's products are not authorized for use as critical components in life support devices or systems. 1. Life support devices or systems are devices or systems which, (a) are intended for surgical implant into the body, or (b) support or sustain life, and whose failure to perform, when properly used in accordance with instructions for use provided in the labelling, can be reasonably expected to result in a significant injury to the user. 2. A critical component is any component of a life support device or system whose failure to perform can be reasonbly expected to cause the failure of the life support device or system, or to affect its safety or effectiveness.
Impala Linear Corporation
ILC6382 1.5
(408) 574-3939
www.impalalinear.com
Oct 1999
19

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